01 / Index

Projects

Selected work across hardware design, RF signal processing, and low-level tools.

Featured systems

Ingesting raw RF time-series IQ data from a USRP B210 to detect motion and classify targets.

USRP B210 / Python / Deep Learning / Signal Processing[writeup]

A pipelined 32-bit core in SystemVerilog paired with a custom two-pass Python assembler.

SystemVerilog / Python / Computer Architecture / Verification[writeup]

Schedule matching and schedule conflict engine serving over 3,200 high school students.

Node.js / Express / REST APIs / NoSQL[writeup]

Cryptographically verified, token-authenticated QR ticketing service for school events.

Node.js / REST APIs / Security[writeup]